1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to an array substrate having polycrystalline silicon thin film transistors for a liquid crystal display (LCD) device.
2. Discussion of the Related Art
Generally, a liquid crystal display (LCD) device utilizes optical anisotropy and polarization properties of liquid crystal molecules to display images. Since the liquid crystal molecules have long and thin structures, alignment orientation of the liquid crystal molecules may be changed by application of an electric field. Accordingly, once the alignment of the liquid crystal molecules is changed, light is refracted according to the alignment of the liquid crystal molecules to display images. The liquid crystal display (LCD) device usually includes an upper substrate, which is commonly referred to as a color filter substrate, having a common electrode, a lower substrate, which is commonly referred to as an array substrate, having a pixel electrode, and a liquid crystal layer interposed between the upper and lower substrates. Accordingly, the liquid crystal display (LCD) device drives the liquid crystal layer by application of an electric field that is formed between the common electrode and the pixel electrode. Currently, an active matrix liquid crystal display (LCD) device (AM-LCD) that includes a plurality of thin film transistors and pixel electrodes arranged in a matrix form has been developed because of its high resolution and ability to display moving images.
FIG. 1 is a perspective view of a liquid crystal display (LCD) device according to the related art. In FIG. 1, a liquid crystal display panel 11 includes a first substrate 5, a second substrate 10, and a liquid crystal layer 14 interposed therebetween. A color filter 8, a black matrix 6, and sub-color filters red (R), a green (G), and a blue (B) are formed on the first substrate 5, and a common electrode 9 is formed on the color filter 8. A plurality of gate lines 15 and a plurality of data lines 26 are formed on the second substrate 10, and a plurality of pixel regions “P” is defined on the second substrate 10 by crossings of the gate and data lines 15 and 26. A thin film transistor “T” is formed at a portion adjacent to the crossings of the gate and data lines 15 and 26, and is connected to the pixel electrode 32. Accordingly, the liquid crystal display (LCD) device controls an amount of transmitted light according to the alignment of the liquid crystal molecules by forming an electric field between the common and pixel electrodes 9 and 32. The thin film transistor “T” includes an active layer (not shown), wherein amorphous silicon or polycrystalline silicon is used for an active layer material. Since a polycrystalline silicon thin film transistor has a faster carrier mobility than an amorphous silicon thin film transistor, the polycrystalline silicon thin film transistor is appropriate for a large-sized liquid crystal display panel.
FIG. 2 is a plan view of an array substrate having a plurality of polycrystalline thin film transistors according to the related art, and FIG. 3 is an expanded plan view of portion “A” in FIG. 2 according to the related art. In FIG. 2, a gate line 52 is formed on a transparent substrate 50 along a first direction, and a data line 54 is formed on the substrate 50 along a second direction. Crossings of the gate and data lines 52 and 54 define a pixel region “P,” wherein a thin film transistor “T” is formed at a portion adjacent to a crossing of the gate and data lines 52 and 54 and a pixel electrode 56 connected thereto is formed in the pixel region “Pn.” The thin film transistor “T” uses polycrystalline silicon as an active layer material and has a dual gate structure. Moreover, a projected portion of the gate line 52 and a portion of the gate line 52 function as first and second gate electrodes 58a and 58b, respectively. A polycrystalline silicon layer 59 overlaps portions with the gate line 52 and each of the overlapped portions function as first and second active channels CH1 and CH2, respectively. The thin film transistor having the dual gate structure can decrease an OFF current by increasing the number of overlapped areas in a spaced region between source and drain electrodes 64 and 66, thereby decreasing a strength of an electric field formed in the overlapped area. The source and drain electrodes 62 and 64 contact the polycrystalline silicon layer 59 through source and drain contact holes 60 and 62, respectively. The source electrode 60 extends from the data line 54, and the drain electrode 66 is electrically connected to the pixel electrode 56 in the pixel region “P.” The pixel electrode 56 in the (n−1)th pixel region “Pn−1” is connected to the drain electrode 66 in the nth pixel region “Pn”.
In FIG. 3, portions of the polycrystalline silicon layer 59 for contacting the source and drain electrodes 64 and 66 have wider areas than the first and second active channels CH1 and CH2. Moreover, a width of the polycrystalline silicon layer 59 is abruptly reduced in a region “D” between the first active channel CH1 and the polycrystalline silicon layer portion for contacting the source electrode 64. However, a portion “E” of the polycrystalline silicon layer 59 under the source contact hole 60 may be deleted during manufacturing processes for the array substrate, thereby resulting in an inferiority of the polycrystalline silicon layer 59. Accordingly, although a signal is applied to the source electrode 64, the thin film transistor “T” does not respond to the signal, thus creating a point defect of the liquid crystal display (LCD) device.